Datasheet

Section 10A I/O Ports
(H8S/2633, H8S/2632, H8S/2631, H8S/2633R)
Page 380 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Table 10A.3 Port 1 Pin Functions
Pin Selection Method and Pin Functions
P17/PO15/
TIOCB2/PWM3/
TCLKD
The pin function is switched as shown below according to the combination of
the TPU channel 2 setting (by bits MD3 to MD0 in TMDR2, bits IOB3 to IOB0
in TIOR2, and bits CCLR1 and CCLR0 in TCR2), bits TPSC2 to TPSC0 in
TCR0 and TCR5, OEB bit in DACR3, bit NDER15 in NDERH, and bit P17DDR.
TPU Channel
2 Setting Table Below (1) Table Below (2)
OEB — 0 0 0 1
P17DDR — 0 1 1 —
NDER15 — — 0 1 —
Pin function TIOCB2 output P17
input
P17
output
PO15
output
PWM3
output
TIOCB2 input
*
1
TCLKD input
*
2
Notes: 1. TIOCB2 input when MD3 to MD0 = B'0000 or B'01xx, and IOB3 =
1.
2. TCLKD input when the setting for either TCR0 or TCR5 is: TPSC2
to TPSC0 = B'111.
TCLKD input when channels 2 and 4 are set to phase counting
mode.
TPU Channel
2 Setting (2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000, B'01xx B'0010 B'0011
IOB3 to IOB0 B'0000
B'0100
B'1xxx
B'0001 to
B'0011
B'0101 to
B'0111
— B'xx00 Other than B'xx00
CCLR1,
CCLR0
— — — — Other
than B'10
B'10
Output
function
— Output
compare
output
— — PWM
mode 2
output
—
x: Don't care