Datasheet

Section 10A I/O Ports
(H8S/2633, H8S/2632, H8S/2631, H8S/2633R)
Page 384 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Pin Selection Method and Pin Functions
P13/PO11/
TIOCD0/TCLKB/
A23
The pin function is switched as shown below according to the combination of
the operating mode, and the TPU channel 0 setting (by bits MD3 to MD0 in
TMDR0, bits IOD3 to IOD0 in TIOR0L, and bits CCLR2 to CCLR0 in TCR0),
bits TPSC2 to TPSC0 in TCR0 to TCR2, bits AE3 to AE0 in PFCR, bit
NDER11 in NDERH, and bit P13DDR.
Operating
mode
Modes 4 to 6
AE3 to AE0 B'0000 to B'1110 B'1111
TPU Channel
0 Setting
Table
Below (1)
Table Below (2) —
P13DDR — 0 1 1 —
NDER11 — — 0 1 —
Pin function TIOCD0
output
P13 input P13 output PO11
output
A23 output
TIOCD0 input
*
1
TCLKB input
*
2
Operating
mode
Mode 7
AE3 to AE0 —
TPU Channel
0 Setting
Table
Below (1)
Table Below (2)
P13DDR — 0 1 1
NDER11 — — 0 1
Pin function TIOCD0
output
P13 input P13 output PO11 output
TIOCD0 input
*
1
TCLKB input
*
2
Notes: 1. TIOCD0 input when MD3 to MD0 = B'0000, and IOD3 to IOD0 =
B'10xx.
2. TCLKB input when the setting for TCR0 to TCR2 is: TPSC2 to
TPSC0 = B'101.
TCLKB input when channels 1 and 5 are set to phase counting
mode.