Datasheet

Section 10A I/O Ports
(H8S/2633, H8S/2632, H8S/2631, H8S/2633R)
Page 422 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Pin Selection Method and Pin Functions
PB6/A14/TIOCA5
The function of this pin changes according to the operating mode and the
setting of bits AE3 to AE0 in PFCR; the TPU5 settings of bits MD3 to MD0 in
TMDR5, bits IOA3 to IOA0 in TIOR5, and the CCLR1 and CCLR0 bits in TCR5;
and the setting of the PB6DDR bit.
Operating
Mode
Modes 4 to 6
AE3 to AE0 B'0000 to B'0110
B'0111 to
B'1111
TPU Channel
5 Setting
Table Below (1) Table Below (2) —
PB6DDR — 0 1 —
PB6 input PB6 output Pin function TIOCA5 output
TIOCA5 input
*
1
A14 output
Operating
Mode
Mode 7
TPU Channel
5 Setting
Table Below (1) Table Below (2)
PB6DDR — 0 1
PB6 input PB6 output Pin function TIOCA5 output
TIOCA5 input
*
1
TPU Channel
5 Setting
(2) (1) (2) (1) (1) (2)
MD3 to MD0 B'0000, B'01xx B'001x B'0010 B'0011
IOA3 to IOA0 B'0000
B'0100
B'1xxx
B'0001 to
B'0011
B'0101 to
B'0111
B'xx00
Other
than
B'xx00
Other than B'xx00
CCLR1,
CCLR0
— — — —
Other
than
B'01
B'01
Output
function
—
Output
compare
output
—
PWM
mode 1
output
*
2
PWM
mode 2
output
—
x: Don't care
Notes: 1. TIOCA5 input when MD3 to MD0 = B'0000 or B'01xx and IOA3 = 1.
2. TIOCB5 output is disabled.