Datasheet

Section 10A I/O Ports
(H8S/2633, H8S/2632, H8S/2631, H8S/2633R)
Page 450 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
10A.12.3 Pin Functions
Port F pins also function as external interrupt input pins (IRQ2 and IRQ3), BUZZ output pin, A/D
trigger input pin (ADTRG), bus control signal input/output pins (AS, RD, HWR, LWR, LCAS,
WAIT, BREQO, BREQ, and BACK) and the system clock (φ) output pin. The pin functions differ
between modes 4 to 6, and mode 7. Port F pin functions are shown in table 10A.23.
Table 10A.23 Port F Pin Functions
Pin Selection Method and Pin Functions
PF7/φ The pin function is switched as shown below according to bit PF7DDR.
PF7DDR 0 1
Pin function PF7 input pin φ output pin
PF6/AS/LCAS The pin function is switched as shown below according to the combination of
the operating mode and bits RMTS2 to RMTS0, LCASS, BREQOE, WAITE,
ABW5 to ABW2, and PF2DDR.
Operating
Mode
Modes 4 to 6 Mode 7
LCASS 0 1
*
—
PF6DDR — — 0 1
Pin function AS output pin LCAS
output pin
PF6 input pin PF6 output pin
Note: * Restricted to RMTS2 to RMTS0=B'001 to B'011, DRAM space 16-bit
access in modes 4 to 6 only
PF5/RD The pin function is switched as shown below according to the operating mode
and bit PF5DDR.
Operating
Mode Modes 4 to 6 Mode 7
PF5DDR — 0 1
Pin function RD output pin PF5 input pin PF5 output pin