Datasheet

Section 10A I/O Ports
(H8S/2633, H8S/2632, H8S/2631, H8S/2633R)
R01UH0166EJ0600 Rev. 6.00 Page 451 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Pin Selection Method and Pin Functions
PF4/HWR The pin function is switched as shown below according to the operating mode
and bit PF4DDR.
Operating
Mode Modes 4 to 6 Mode 7
PF4DDR — 0 1
Pin function HWR output pin PF4 input pin PF4 output pin
PF3/LWR/ADTRG/
IRQ3
The pin function is switched as shown below according to the operating mode,
the bus mode, A/D converter bits TRGS1 and TRGS0, and bit PF3DDR.
Operating
mode
Modes 4 to 6 Mode 7
Bus mode 16-bit bus
mode
8-bit bus mode —
PF3DDR — 0 1 0 1
Pin function LWR output
pin
PF3 input
pin
PF3 output
pin
PF3 input
pin
PF3 output
pin
ADTRG input pin
*
1
IRQ3 input pin
*
2
Notes: 1. ADTRG input when TRGS0 = TRGS1 = 1.
2. When used as an external interrupt input pin, do not use as an I/O
pin for another function.
PF2/LCAS/WAIT/
BREQO
The pin function is switched as shown below according to the combination of
the operating mode and bits RMTS2 to RMTS0, LCASS, BREQOE, WAITE,
ABW5 to ABW2, and PF2DDR.
Operating
Mode
Modes 4 to 6 Mode 7
LCASS 0
*
1 —
BREQOE — 0 1 —
WAITE — 0 1 — —
PF2DDR — 0 1 — — 0 1
Pin function LCAS
output
pin
PF2
input
pin
PF2
output
pin
WAIT
input
pin
BREQO
output
pin
PF2
input
pin
PF2
output
pin
Note: * Restricted to RMTS2 to RMTS0=B'001 to B'011, DRAM space 16-bit
access in modes 4 to 6 only.