Datasheet

R01UH0166EJ0600 Rev. 6.00 Page li of lvi
Mar 02, 2011
20.2.1 D/A Data Registers 0 to 3 (DADR0 to DADR3) .............................................. 930
20.2.2 D/A Control Register 01 and 23 (DACR01 and DACR23) .............................. 930
20.2.3 Module Stop Control Register A and C (MSTPCRA and MSTPCRC)............ 932
20.3 Operation .......................................................................................................................... 934
Section 21 RAM ................................................................................................................... 935
21.1 Overview........................................................................................................................... 935
21.1.1 Block Diagram.................................................................................................. 935
21.1.2 Register Configuration...................................................................................... 936
21.2 Register Descriptions........................................................................................................ 936
21.2.1 System Control Register (SYSCR) ................................................................... 936
21.3 Operation .......................................................................................................................... 937
21.4 Usage Notes ...................................................................................................................... 937
Section 22 ROM ................................................................................................................... 939
22.1 Overview........................................................................................................................... 939
22.1.1 Block Diagram.................................................................................................. 939
22.1.2 Register Configuration...................................................................................... 939
22.2 Register Descriptions........................................................................................................ 940
22.2.1 Mode Control Register (MDCR) ...................................................................... 940
22.3 Operation .......................................................................................................................... 940
22.4 Flash Memory Overview .................................................................................................. 943
22.4.1 Features............................................................................................................. 943
22.4.2 Overview........................................................................................................... 944
22.4.3 Flash Memory Operating Modes ...................................................................... 945
22.4.4 On-Board Programming Modes........................................................................ 946
22.4.5 Flash Memory Emulation in RAM ................................................................... 948
22.4.6 Differences between Boot Mode and User Program Mode .............................. 949
22.4.7 Block Configuration.......................................................................................... 950
22.4.8 Pin Configuration.............................................................................................. 950
22.4.9 Register Configuration...................................................................................... 951
22.5 Register Descriptions........................................................................................................ 952
22.5.1 Flash Memory Control Register 1 (FLMCR1).................................................. 952
22.5.2 Flash Memory Control Register 2 (FLMCR2).................................................. 955
22.5.3 Erase Block Register 1 (EBR1) ........................................................................ 956
22.5.4 Erase Block Register 2 (EBR2) ........................................................................ 957
22.5.5 RAM Emulation Register (RAMER)................................................................ 958
22.5.6 Flash Memory Power Control Register (FLPWCR)......................................... 960
22.5.7 Serial Control Register X (SCRX).................................................................... 960
22.6 On-Board Programming Modes........................................................................................ 961