Datasheet
Page lii of lvi    R01UH0166EJ0600 Rev. 6.00 
    Mar 02, 2011 
22.6.1  Boot Mode ........................................................................................................ 962 
22.6.2  User Program Mode.......................................................................................... 966 
22.7  Programming/Erasing Flash Memory............................................................................... 968 
22.7.1  Program Mode .................................................................................................. 969 
22.7.2  Program-Verify Mode....................................................................................... 970 
22.7.3  Erase Mode ....................................................................................................... 974 
22.7.4  Erase-Verify Mode ........................................................................................... 974 
22.8  Protection.......................................................................................................................... 976 
22.8.1  Hardware Protection ......................................................................................... 976 
22.8.2  Software Protection........................................................................................... 977 
22.8.3  Error Protection................................................................................................. 978 
22.9  Flash Memory Emulation in RAM ................................................................................... 980 
22.10  Interrupt Handling when Programming/Erasing Flash Memory....................................... 982 
22.11  Programmer Mode............................................................................................................ 982 
22.11.1  Socket Adapter and Memory Map.................................................................... 983 
22.12  Flash Memory and Power-Down States............................................................................ 985 
22.12.1  Note on Power-Down States............................................................................. 985 
22.13  Flash Memory Programming and Erasing Precautions..................................................... 986 
22.14  Note on Switching from F-ZTAT Version to Mask ROM Version.................................. 991 
Section 23A Clock Pulse Generator 
   (H8S/2633, H8S/2632, H8S/2631, H8S/2633F) ................................ 993 
23A.1  Overview........................................................................................................................ 993 
23A.1.1  Block Diagram............................................................................................... 993 
23A.1.2  Register Configuration................................................................................... 994 
23A.2 Register Descriptions ..................................................................................................... 994 
23A.2.1  System Clock Control Register (SCKCR)..................................................... 994 
23A.2.2 Low-Power Control Register (LPWRCR)..................................................... 995 
23A.3 Oscillator........................................................................................................................ 996 
23A.3.1  Connecting a Crystal Resonator .................................................................... 996 
23A.3.2 External Clock Input...................................................................................... 999 
23A.4 PLL Circuit................................................................................................................... 1001 
23A.5 Medium-Speed Clock Divider...................................................................................... 1001 
23A.6  Bus Master Clock Selection Circuit ............................................................................. 1002 
23A.7 Subclock Oscillator ...................................................................................................... 1002 
23A.8 Subclock Waveform Shaping Circuit........................................................................... 1003 
23A.9  Note on Crystal Resonator ........................................................................................... 1003 
Section 23B Clock Pulse Generator (H8S/2633R, H8S/2695) ............................. 1005 
23B.1 Overview...................................................................................................................... 1005 










