Datasheet

Section 10B I/O Ports
(H8S/2695)
Page 482 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
10B.3.3 Pin Functions
The port 3 pins double as SCI I/O input pins (TxD0, RxD0, SCK0, TxD1, RxD1, SCK1, TxD4,
RxD4, SCK4), external interrupt input pins (IRQ4, IRQ5). The functions of port 3 pins are shown
in table 10B.5.
Table 10B.5 Port 3 Pin Functions
Pin Selection Method and Pin Functions
P37/TxD4 Switches as follows according to combinations of SCR TE bit of SCI4 and the
P37DDR bit.
TE 0 1
P37DDR 0 1 —
Pin function P37 input pin P37 output pin
*
TxD4 output pin
Note: * When P37ODR = 1, it becomes NMOS open drain output.
P36/RxD4 Switches as follows according to combinations of SCR RE bit of SCI4 and the
P36DDR bit.
RE 0 1
P36DDR 0 1 —
Pin function P36 input pin P36 output pin
*
RxD4 input pin
Note: * When P36ODR = 1, it becomes NMOS open drain output.
P35/SCK1/
SCK4/IRQ5
Switches as follows according to combinations of the SMR C/A bit of SCI1 or SCI4,
the SCR CKE0 and CKE1 bits, and the P35DDR bit.
SCK1 and SCK4 should not be set to output simultaneously.
CKE1 (SCI1)
CKE1 (SCI4)
0
0
0
*1
1
*1
1
*1
0
*1
1
1
C/A (SCI1)
C/A (SCI4)
0
0
1
1
— — —
CKE0 (SCI1)
CKE0 (SCI4)
0
0
0, 1, 1
*3
1, 0, 1
*3
— — — —
P35DDR 0 1 — — — — 0
*2
Pin function P35 input
pin
P35
*3
output pin
SCK1/SCK4
*3
output pin
SCK1/SCK4
*3
output pin
— —
SCK1/SCK4
input pin
IRQ5 input
Notes: 1. These settings are prohibited.
2. If SCK1 and SCK4 are used as input (clock input) pins on the H8S/2695,
P35DDR must be cleared to 0.
3. The output format is CMOS output. It becomes NMOS open drain output
if P35ODR is set to 1.