Datasheet

Section 10B I/O Ports
(H8S/2695)
Page 510 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Pin Selection Method and Pin Functions
PB4/A12/TIOCA4
The function of this pin changes according to the operating mode and the
setting of bits AE3 to AE0 in PFCR; the TPU4 settings of bits MD3 to MD0 in
TMDR4, bits IOA3 to IOA0 in TIOR4, and the CCLR1 and CCLR0 bits in TCR4;
and the setting of the PB4DDR bit.
Operating
Mode
Modes 4 to 6
AE3 to AE0 B'0000 to B'0100
B'0101 to
B'1111
TPU Channel
4 Setting
Table Below (1) Table Below (2) —
PB4DDR — 0 1 —
PB4 input PB4 output Pin function TIOCA4 output
TIOCA4 input
*
1
A12 output
Operating
Mode
Mode 7
TPU Channel
4 Setting
Table Below (1) Table Below (2)
PB4DDR — 0 1
PB4 input PB4 output Pin function TIOCA4 output
TIOCA4 input
*
1
TPU Channel
4 Setting
(2) (1) (2) (1) (1) (2)
MD3 to MD0 B'0000, B'01xx B'001x B'0010 B'0011
IOA3 to IOA0 B'0000
B'0100
B'1xxx
B'0001 to
B'0011
B'0101 to
B'0111
B'xx00
Other
than
B'xx00
Other than B'xx00
CCLR1,
CCLR0
— — — —
Other
than
B'01
B'01
Output
function
—
Output
compare
output
—
PWM
mode 1
output
*
2
PWM
mode 2
output
—
x: Don't care
Notes: 1. TIOCA4 input when MD3 to MD0 = B'0000 or B'01xx and IOA3 to
IOA0 = B'10xx.
2. TIOCB4 output is disabled.