Datasheet

Section 10B I/O Ports
(H8S/2695)
Page 512 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Pin Selection Method and Pin Functions
PB2/A10/TIOCC3
The function of this pin changes according to the operating mode and the
setting of bits AE3 to AE0 in PFCR; the TPU3 settings of bits MD3 to MD0 in
TMDR3, bits IOC3 to IOC0 in TIORL3, and bits CCLR2 to CCLR0 in TCR3;
and the setting of the PB2DDR bit.
Operating
Mode
Modes 4 to 6
AE3 to AE0 B'0000 to B'0010
B'0011 to
B'1111
TPU Channel
3 Setting
Table Below (1) Table Below (2) —
PB2DDR — 0 1 —
PB2 input PB2 output Pin function TIOCC3 output
TIOCC3 input
*
1
A10 output
Operating
Mode
Mode 7
TPU Channel
3 Setting
Table Below (1) Table Below (2)
PB2DDR — 0 1
PB2 input PB2 output Pin function TIOCC3 output
TIOCC3 input
*
1
TPU Channel
3 Setting
(2) (1) (2) (1) (1) (2)
MD3 to MD0 B'0000 B'001x B'0010 B'0011
IOC3 to IOC0 B'0000
B'0100
B'1xxx
B'0001 to
B'0011
B'0101 to
B'0111
B'xx00
Other
than
B'xx00
Other than B'xx00
CCLR2 to
CCLR0
— — — —
Other
than
B'101
B'101
Output
function
—
Output
compare
output
—
PWM
mode 1
output
*
2
PWM
mode 2
output
—
x: Don't care
Notes: 1. TIOCC3 input when MD3 to MD0 = B'0000 and IOC3 to IOC0 =
B'10xx.
2. TIOCD3 output is disabled.