Datasheet

Section 10B I/O Ports
(H8S/2695)
Page 526 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Port D MOS Pull-Up Control Register (PDPCR)
Bit : 7 6 5 4 3 2 1 0
PD7PCR PD6PCR PD5PCR PD4PCR PD3PCR PD2PCR PD1PCR PD0PCR
Initial value : 0 0 0 0 0 0 0 0
R/W : R/W R/W R/W R/W R/W R/W R/W R/W
PDPCR is an 8-bit readable/writable register that controls the MOS input pull-up function
incorporated into port D on an individual bit basis.
When a PDDDR bit is cleared to 0 (input port setting) in mode 7, setting the corresponding
PDPCR bit to 1 turns on the MOS input pull-up for the corresponding pin.
PDPCR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its
prior state by a manual reset or in software standby mode.
10B.10.3 Pin Functions for Each Mode
Modes 4 to 6: In modes 4 to 6, port D pins are automatically designated as data I/O pins.
Port D pin functions in modes 4 to 6 are shown in figure 10B.13.
D15
D14
D13
D12
D11
D10
D9
D8
Port D
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
Figure 10B.13 Port D Pin Functions (Modes 4 to 6)
Mode 7: In mode 7, port D pins function as I/O ports. Input or output can be specified for each pin
on an individual bit basis. Setting a PDDDR bit to 1 makes the corresponding port D pin an output
port, while clearing the bit to 0 makes the pin an input port.