Datasheet

Section 10B I/O Ports
(H8S/2695)
R01UH0166EJ0600 Rev. 6.00 Page 529 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
10B.11.2 Register Configuration
Table 10B.20 shows the port E register configuration.
Table 10B.20 Port E Registers
Name Abbreviation R/W Initial Value Address
*
Port E data direction register PEDDR W H'00 H'FE3D
Port E data register PEDR R/W H'00 H'FF0D
Port E register PORTE R Undefined H'FFBD
Port E MOS pull-up control register PEPCR R/W H'00 H'FE44
Note: * Lower 16 bits of the address.
Port E Data Direction Register (PEDDR)
Bit : 7 6 5 4 3 2 1 0
PE7DDR PE6DDR PE5DDR PE4DDR PE3DDR PE2DDR PE1DDR PE0DDR
Initial value : 0 0 0 0 0 0 0 0
R/W : W W W W W W W W
PEDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port E. PEDDR cannot be read; if it is, an undefined value will be read.
PEDDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its
prior state by a manual reset or in software standby mode.
• Modes 4 to 6
When 8-bit bus mode has been selected, port E pins function as I/O ports. Setting a PEDDR bit
to 1 makes the corresponding port E pin an output port, while clearing the bit to 0 makes the
pin an input port.
When 16-bit bus mode has been selected, the input/output direction specification by PEDDR is
ignored, and port E is designated for data I/O.
For details of 8-bit and 16-bit bus modes, see section 7, Bus Controller.
• Mode 7
Setting a PEDDR bit to 1 makes the corresponding port E pin an output port, while clearing
the bit to 0 makes the pin an input port.