Datasheet

Section 11 16-Bit Timer Pulse Unit (TPU)
R01UH0166EJ0600 Rev. 6.00 Page 571 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Bit 3 Bit 2 Bit 1 Bit 0
Channel IOA3 IOA2 IOA1 IOA0 Description
4 0 0 0 0 Output disabled (Initial value)
1 0 output at compare match
1 0 1 output at compare match
1
TGR4A
is output
compare
register
Initial output is 0
output
Toggle output at compare
match
1 0 0 Output disabled
1 0 output at compare match
1 0 1 output at compare match
1
Initial output is 1
output
Toggle output at compare
match
1 0 0 0 Input capture at rising edge
1 Input capture at falling edge
1 *
Capture input
source is
TIOCA4 pin
Input capture at both edges
1 * *
TGR4A
is input
capture
register
Capture input
source is TGR3A
compare match/
input capture
Input capture at generation of
TGR3A compare match/input
capture
*: Don't care
Bit 3 Bit 2 Bit 1 Bit 0
Channel IOA3 IOA2 IOA1 IOA0 Description
5 0 0 0 0 Output disabled (Initial value)
1 0 output at compare match
1 0 1 output at compare match
1
TGR5A
is output
compare
register
Initial output is 0
output
Toggle output at compare
match
1 0 0 Output disabled
1 0 output at compare match
1 0 1 output at compare match
1
Initial output is 1
output
Toggle output at compare
match
1 * 0 0 Input capture at rising edge
1 Input capture at falling edge
1 *
TGR5A
is input
capture
register
Capture input
source is
TIOCA5 pin
Input capture at both edges
*: Don't care