Datasheet
Section 1 Overview
Page 8 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
PE7/D7
PE6/D6
PE5/ D5
PE4/ D4
PE3/ D3
PE2/ D2
PE1/ D1
PE0/ D0
PD7/ D15
PD6/ D14
PD5/ D13
PD4/ D12
PD3/ D11
PD2/ D10
PD1/D9
PD0/D8
PVCC1
PV
CC2
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
PA3/ A19/SCK2
PA2/ A18/RxD2
PA1/ A17/TxD2
PA0/ A16
PB7/ A15/TIOCB5
PB6/ A14/TIOCA5
PB5/ A13/TIOCB4
PB4/ A12/TIOCA4
PB3 / A11/TIOCD3
PB2/A10/TIOCC3
PB1/ A9/TIOCB3
PB0/ A8/TIOCA3
PC7/ A7/PWM1
PC6/ A6/PWM0
PC5/ A5
PC4/ A4
PC3/ A3
PC2/ A2
PC1/ A1
PC0/ A0
P37/TxD4
P36/ RxD4
P35/ SCK1/SCK4/SCL0/IRQ
5
P34/ RxD1/SDA0
P33/ TxD1/SCL1
P32/ SCK0/SDA1/IRQ4
P31/ RxD0/IrRxD
P30/ TxD0/IrTxD
P97/ AN15/DA3
P96/ AN14/DA2
P95/AN13
P94/AN12
P93/AN11
P92/AN10
P91/AN9
P90/AN8
P47/ AN7/DA1
P46/ AN6/DA0
P45/ AN5
P44/ AN4
P43/ AN3
P42/ AN2
P41/ AN1
P40/ AN0
Vref
AVCC
AVSS
P17/ PO15/TIOCB2/PWM3/ TCLKD
P16/ PO14/TIOCA2/PWM2/
IRQ1
P15/ PO13/TIOCB1/ TCLKC
P14/ PO12/TIOCA1/IRQ0
P13/ PO11/TIOCD0/ TCLKB/A23
P12/ PO10/TIOCC0/ TCLKA/A22
P11/ PO9/TIOCB0/ DACK1/A21
P10/ PO8/TIOCA0/ DACK0/A20
P77/TxD3
P76/RxD3
P75/ TMO3/SCK3
P74/ TMO2/MRES
P73/ TMO1/TEND1/CS7
P72/ TMO0/TEND0/CS6
P71/
TMR23/TMC23/DREQ1/CS5
P70/
TMR01/TMC01/DREQ0/CS4
PG4/ CS0
PG3/ CS1
PG2/ CS2
PG1/ CS3/OE/IRQ7
PG0/ CAS/IRQ6
PF7/ φ
PF6/ AS/LCAS
PF5/ RD
PF4/ HWR
PF3/ LWR/ADTRG/IRQ3
PF2/ LCAS /WAIT /BREQO
PF1/ BACK/BUZZ
PF0/ BREQ/IRQ2
RAM
TPU
PPG
MD2
MD1
MD0
OSC2
OSC1
EXTAL
XTAL
PLLVCC
PLLCAP
PLLVSS
STBY
RES
WDTOVF
NMI
FWE
*
2
H8S/2600 CPU
DTC
DMAC
Internal data bus
Peripheral data bus
Peripheral address bus
Port 4Port 1
Port D Port E
Internal address bus
Port A
Port B
Port C
Port 9 Port 3
Bus controller
Clock pulse
generator
PLL
Port FPort GPort 7
ROM
(Mask ROM,
flash memory
*
1
)
PC break controller
(2 channels)
WDT × 2 channels
I
2
C bus interface
(option)
14-bit PWM timer
8bit timer × 4 channels
SCI × 5 channels
(IrDA × 1channel)
A/D converter
D/A converter
Interrupt controller
Notes: 1. Applies to the flash memory version only.
2. The FWE pin is used only in the flash memory version.
Figure 1.1 (a) H8S/2633, H8S/2633F, H8S/2632, H8S/2631 Internal Block Diagram










