Datasheet
Section 11 16-Bit Timer Pulse Unit (TPU)
Page 584 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
11.3 Interface to Bus Master
11.3.1 16-Bit Registers
TCNT and TGR are 16-bit registers. As the data bus to the bus master is 16 bits wide, these
registers can be read and written to in 16-bit units.
These registers cannot be read or written to in 8-bit units; 16-bit access must always be used.
An example of 16-bit register access operation is shown in figure 11.2.
Bus interface
H
Internal data bus
L
Bus
master
Module
data bus
TCNTH TCNTL
Figure 11.2 16-Bit Register Access Operation [Bus Master ↔ TCNT (16 Bits)]
11.3.2 8-Bit Registers
Registers other than TCNT and TGR are 8-bit. As the data bus to the CPU is 16 bits wide, these
registers can be read and written to in 16-bit units. They can also be read and written to in 8-bit
units.










