Datasheet

Section 13 8-Bit Timers (TMR)
(This function is not available in the H8S/2695)
R01UH0166EJ0600 Rev. 6.00 Page 679 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
13.5 Sample Application
In the example below, the 8-bit timer is used to generate a pulse output with a selected duty cycle,
as shown in figure 13.9. The control bits are set as follows:
[1] In TCR, bit CCLR1 is cleared to 0 and bit CCLR0 is set to 1 so that TCNT is cleared by
comparing and matching TCORA.
[2] In TCSR, bits OS3 to OS0 are set to B'0110, causing the output to change to 1 at a TCORA
compare match and to 0 at a TCORB compare match.
With these settings, the 8-bit timer provides output of pulses at a rate determined by TCORA with
a pulse width determined by TCORB. No software intervention is required.
TCNT
H'FF
Counter clear
TCORA
TCORB
H'00
TMO
Figure 13.9 Example of Pulse Output