Datasheet

Section 14 14-Bit PWM D/A
(This function is not available in the H8S/2695)
R01UH0166EJ0600 Rev. 6.00 Page 693 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Bit 7—Test Mode (TEST): Selects test mode, which is used in testing the chip. Normally this bit
should be cleared to 0.
Bit 7
TEST Description
0 PWM (D/A) in user state: normal operation (Initial value)
1 PWM (D/A) in test state: correct conversion results unobtainable
Bit 6—PWM Enable (PWME): Starts or stops the PWM D/A counter (DACNT).
Bit 6
PWME Description
0 DACNT operates as a 14-bit up-counter (Initial value)
1 DACNT halts at H'0003
Bits 5 and 4—Reserved: These bits cannot be modified and are always read as 1.
Bit 3—Output Enable B (OEB): Enables or disables output on PWM D/A channel B.
Bit 3
OEB Description
0 PWM (D/A) channel B output (at the PWM1/PWM3 pin) is disabled (Initial value)
1 PWM (D/A) channel B output (at the PWM1/PWM3 pin) is enabled
Bit 2—Output Enable A (OEA): Enables or disables output on PWM D/A channel A.
Bit 2
OEA Description
0 PWM (D/A) channel A output (at the PWM0/PWM2 pin) is disabled (Initial value)
1 PWM (D/A) channel A output (at the PWM0/PWM2 pin) is enabled