Datasheet

Section 14 14-Bit PWM D/A
(This function is not available in the H8S/2695)
Page 702 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
2. OS = 1 (DADR corresponds to T
H
)
a. CFS = 0 [base cycle = resolution (T) × 64]
t
H1
t
H2
t
H3
t
H255
t
H256
t
f1
t
f2
t
f255
t
f256
1 conversion cycle
t
f1
= t
f2
= t
f3
= · · · = t
f255
= t
f256
= T × 64
t
H1
+ t
H2
+ t
H3
+ · · · + t
H255
+ t
H256
= T
H
Figure 14.4 (3) Output Waveform
b. CFS = 1 [base cycle = resolution (T) × 256]
t
H1
t
H2
t
H3
t
H63
t
H64
t
f1
t
f2
t
f63
t
f64
1 conversion cycle
t
f1
= t
f2
= t
f3
= · · · = t
f63
= t
f64
= T × 256
t
H1
+ t
H2
+ t
H3
+ · · · + t
H63
+ t
H64
= T
H
Figure 14.4 (4) Output Waveform