Datasheet

Section 15 Watchdog Timer
(WDT1 is not available in the H8S/2695)
Page 710 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
WDT1
*
Mode Select
WDT1
WT/IT Description
0 Interval timer mode: WDT1 requests an interval timer interrupt (WOVI)
from the CPU when the TCNT overflows. (Initial value)
1 Watchdog timer mode: WDT1 requests a reset or an NMI interrupt from
the CPU when the TCNT overflows.
Note: * In the case of the H8S/2695, only 0 should be written to the WT/IT bit in the TCSR1
register.
Bit 5—Timer Enable (TME): Selects whether TCNT runs or is halted.
Bit 5
TME Description
0 TCNT is initialized to H'00 and halted (Initial value)
1 TCNT counts
WDT0 TCSR Bit 4—Reserved Bit: This bit is always read as 1 and cannot be modified.
Note: In the case of the H8S/2695, only 0 should be written to the TME bit in the TCSR1
register.
WDT1 TCSR Bit 4—Prescaler Select (PSS): This bit is used to select an input clock source for
the TCNT of WDT1.
See the descriptions of Clock Select 2 to 0 for details.
WDT1 TCSR
Bit 4
PSS Description
0 The TCNT counts frequency-division clock pulses of the φ based
prescaler (PSM). (Initial value)
1 The TCNT counts frequency-division clock pulses of the φ SUB-based prescaler
(PSS).
Note: In the case of the H8S/2695, only 0 should be written to the PSS bit in the TCSR1 register.