Datasheet

Section 16 Serial Communication Interface (SCI, IrDA)
(The H8S/2695 is not equipped with an IrDA function)
R01UH0166EJ0600 Rev. 6.00 Page 749 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
The BRR setting is found from the following formulas.
Asynchronous mode:
N =
φ
64 × 2
2n–1
× B
× 10
6
– 1
Clocked synchronous mode:
N =
φ
8 × 2
2n–1
× B
× 10
6
– 1
Where B: Bit rate (bit/s)
N: BRR setting for baud rate generator (0 ≤ N ≤ 255)
φ: Operating frequency (MHz)
n: Baud rate generator input clock (n = 0 to 3)
(See the table below for the relation between n and the clock.)
SMR Setting
n Clock CKS1 CKS0
0 φ 0 0
1 φ/4 0 1
2 φ/16 1 0
3 φ/64 1 1
The bit rate error in asynchronous mode is found from the following formula:
Error (%) = {
φ × 10
6
(N + 1) × B × 64 × 2
2n–1
– 1} × 100