Datasheet

Section 16 Serial Communication Interface (SCI, IrDA)
(The H8S/2695 is not equipped with an IrDA function)
R01UH0166EJ0600 Rev. 6.00 Page 795 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Restrictions on Use of DMAC
*
or DTC
*
• When an external clock source is used as the serial clock, the transmit clock should not be
input until at least 5 φ clock cycles after TDR is updated by the DMAC or DTC. Misoperation
may occur if the transmit clock is input within 4 φ clocks after TDR is updated. (Figure 16.24)
• When RDR is read by the DMAC
*
or DTC
*
, be sure to set the activation source to the relevant
SCI reception end interrupt (RXI).
t
D0
LSB
Serial data
SCK
D1
D3 D4 D5D2 D6 D7
Note: When operating on an external clock, set t >4 clocks.
TDRE
Figure 16.24 Example of Clocked Synchronous Transmission by DTC
*
Note: * DMAC and DTC functions are not available in the H8S/2695.