Datasheet

Section 17 Smart Card Interface

R01UH0166EJ0600 Rev. 6.00 Page 813 of 1434

Mar 02, 2011

H8S/2633 Group, H8S/2633 F-ZTAT

H8S/2633R F-ZTAT

, H8S/2695

17.2.4 Serial Control Register (SCR)

Bit : 7 6 5 4 3 2 1 0

TIE RIE TE RE MPIE TEIE CKE1 CKE0

Initial value : 0 0 0 0 0 0 0 0

R/W : R/W R/W R/W R/W R/W R/W R/W R/W

In smart card interface mode, the function of bits 1 and 0 of SCR changes when bit 7 of the serial

mode register (SMR) is set to 1.

Bits 7 to 2—Operate in the same way as for the normal SCI.

For details, see section 16.2.6, Serial Control Register (SCR).

Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): These bits are used to select the SCI clock

source and enable or disable clock output from the SCK pin.

In smart card interface mode, in addition to the normal switching between clock output enabling

and disabling, the clock output can be specified as to be fixed high or low.

SCMR SMR SCR Setting

SMIF C/A, GM CKE1 CKE0 SCK Pin Function

0 See the SCI

1 0 0 0 Operates as port I/O pin

1 0 0 1 Outputs clock as SCK output pin

1 1 0 0 Operates as SCK output pin, with output fixed

low

1 1 0 1 Outputs clock as SCK output pin

1 1 1 0 Operates as SCK output pin, with output fixed

high

1 1 1 1 Outputs clock as SCK output pin