Datasheet

Section 17 Smart Card Interface

Page 820 of 1434 R01UH0166EJ0600 Rev. 6.00

Mar 02, 2011

H8S/2633 Group, H8S/2633 F-ZTAT

H8S/2633R F-ZTAT

, H8S/2695

17.3.5 Clock

Only an internal clock generated by the on-chip baud rate generator can be used as the

transmit/receive clock for the smart card interface. The bit rate is set with BRR and the CKS1,

CKS0, BCP1 and BCP0 bits in SMR. The formula for calculating the bit rate is as shown below.

Table 17.5 shows some sample bit rates.

If clock output is selected by setting CKE0 to 1, a clock is output from the SCK pin. The clock

frequency is determined by the bit rate and the setting of bits BCP1 and BCP0.

B =

S × 2

2n+1

× (N + 1)

× 10

Where: N = Value set in BRR (0 ≤ N ≤ 255)

B = Bit rate (bit/s)

φ = Operating frequency (MHz)

n = See table 17.4

S = Number of internal clocks in 1-bit period, set by BCP1 and BCP0

Table 17.4 Correspondence between n and CKS1, CKS0

n CKS1 CKS0

0 0 0

1 1

2 1 0

3 1

Table 17.5 Examples of Bit Rate B (bit/s) for Various BRR Settings

(When n = 0 and S = 372)

φ (MHz)

N 10.00 10.714 13.00 14.285 16.00 18.00 20.00 25.00 28.00

0 13441 14400 17473 19200 21505 24194 26882 33602 37634

1 6720 7200 8737 9600 10753 12097 13441 16801 18817

2 4480 4800 5824 6400 7168 8065 8961 11201 12545

Note: Bit rates are rounded to the nearest whole number.