Datasheet

Section 17 Smart Card Interface

R01UH0166EJ0600 Rev. 6.00 Page 823 of 1434

Mar 02, 2011

H8S/2633 Group, H8S/2633 F-ZTAT

H8S/2633R F-ZTAT

, H8S/2695

Serial Data Transmission (Except Block Transfer Mode): As data transmission in smart card

mode involves error signal sampling and retransmission processing, the processing procedure is

different from that for the normal SCI. Figure 17.4 shows a flowchart for transmitting, and figure

17.5 shows the relation between a transmit operation and the internal registers.

[1] Perform Smart Card interface mode initialization as described above in Initialization.

[2] Check that the ERS error flag in SSR is cleared to 0.

[3] Repeat steps [2] and [3] until it can be confirmed that the TEND flag in SSR is set to 1.

[4] Write the transmit data to TDR, clear the TDRE flag to 0, and perform the transmit operation.

The TEND flag is cleared to 0.

[5] When transmitting data continuously, go back to step [2].

[6] To end transmission, clear the TE bit to 0.

With the above processing, interrupt servicing or data transfer by the DMAC

or DTC

possible.

If transmission ends and the TEND flag is set to 1 while the TIE bit is set to 1 and interrupt

requests are enabled, a transmit data empty interrupt (TXI) request will be generated. If an error

occurs in transmission and the ERS flag is set to 1 while the RIE bit is set to 1 and interrupt

requests are enabled, a transfer error interrupt (ERI) request will be generated.

The timing for setting the TEND flag depends on the value of the GM bit in SMR. The TEND

flag set timing is shown in figure 17.6.

If the DMAC

or DTC

is activated by a TXI request, the number of bytes set in the DMAC

DTC

can be transmitted automatically, including automatic retransmission.

For details, see Interrupt Operation and Data Transfer Operation by DMAC or DTC below.

Notes: For block transfer mode, see section 16.3.2, Operation in Asynchronous Mode.

* The DMAC and DTC are not available in the H8S/2695.