Datasheet
Section 18 I
2
C Bus Interface [Option]
(This function is not available in the H8S/2695)
R01UH0166EJ0600 Rev. 6.00 Page 853 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Bit 3
ACKE Description
0 The value of the acknowledge bit is ignored, and continuous transfer
is performed (Initial value)
1 If the acknowledge bit is 1, continuous transfer is interrupted
Bit 2—Bus Busy (BBSY): The BBSY flag can be read to check whether the I
2
C bus (SCL, SDA)
is busy or free. In master mode, this bit is also used to issue start and stop conditions.
A high-to-low transition of SDA while SCL is high is recognized as a start condition, setting
BBSY to 1. A low-to-high transition of SDA while SCL is high is recognized as a stop condition,
clearing BBSY to 0.
To issue a start condition, use a MOV instruction to write 1 in BBSY and 0 in SCP. A retransmit
start condition is issued in the same way. To issue a stop condition, use a MOV instruction to
write 0 in BBSY and 0 in SCP. It is not possible to write to BBSY in slave mode; the I
2
C bus
interface must be set to master transmit mode before issuing a start condition. MST and TRS
should both be set to 1 before writing 1 in BBSY and 0 in SCP.
Bit 2
BBSY Description
0 Bus is free (Initial value)
[Clearing condition]
When a stop condition is detected
1 Bus is busy
[Setting condition]
When a start condition is detected










