Datasheet

Section 18 I
2
C Bus Interface [Option]
(This function is not available in the H8S/2695)
R01UH0166EJ0600 Rev. 6.00 Page 895 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
• Notes on Start Condition Issuance for Retransmission
Figure 18.22 shows the timing of start condition issuance for retransmission, and the timing for
subsequently writing data to ICDR, together with the corresponding flowchart.
Read SCL pin
Write transmit data to ICDR
Clear IRIC in ICSR
Write BBSY = 1,
SCP = 0 (ICSR)
IRIC= 1 ?
No
SCL= Low ?
No
Yes
Start condition
issuance?
No
[1]
[2]
[3]
[4]
[5]
Note: Program so that processing from [3] to [5] is
executed continuously.
[1] Wait for end of 1-byte transfer.
[2] Determine whether SCL is low.
[3] Issue restart condition instruction for retransmission.
[4] Determine whether SCL is high.
[5] Set transmit data (slave address + R/W).
Other processing
Yes
Yes
Read SCL pin
SCL= High ?
No
Yes
Start condition
(retransmission)
SCL
Bit 7ACK
IRIC
[1] IRIC determination Determination
of SCL = low
[2]
[3] Start condition
instruction issuance
[4] Determination
of SCL = high
[5] ICDR write
SDA
Figure 18.22 Flowchart and Timing of Start Condition Instruction Issuance for
Retransmission