Datasheet

Section 19 A/D Converter
Page 904 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
19.1.2 Block Diagram
Figure 19.1 shows a block diagram of the A/D converter.
Module data bus
Control circuit
Internal data bus
10-bit D/A
Comparator
+
–
Sample-and-
hold circuit
φ/2
φ/4
φ/8
ADI
interrupt
φ/16
Bus interface
A
D
C
S
R
A
D
C
R
A
D
D
R
D
A
D
D
R
C
A
D
D
R
B
A
D
D
R
A
AVCC
Vref
AVSS
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
ADTRG
Conversion start
trigger from 8-bit
timer
*
or TPU
Successive approximations
register
Multiplexer
ADCR
ADCSR
ADDRA
ADDRB
ADDRC
ADDRD
Note: * This function is not available in the H8S/2695.
: A/D control register
: A/D control/status register
: A/D data register A
: A/D data register B
: A/D data register C
: A/D data register D
Figure 19.1 Block Diagram of A/D Converter