Datasheet

Section 21 RAM

R01UH0166EJ0600 Rev. 6.00 Page 935 of 1434

Mar 02, 2011

H8S/2633 Group, H8S/2633 F-ZTAT

H8S/2633R F-ZTAT

, H8S/2695

Section 21 RAM

21.1 Overview

The H8S/2633 and H8S/2633R have 16 kbytes of on-chip high-speed static RAM, the H8S/2632

has 12 kbytes, and the H8S/2631 and H8S/2695 have 8 kbytes. The RAM is connected to the CPU

by a 16-bit data bus, enabling one-state access by the CPU to both byte data and word data. This

makes it possible to perform fast word data transfer.

The on-chip RAM can be enabled or disabled by means of the RAM enable bit (RAME) in the

system control register (SYSCR).

21.1.1 Block Diagram

Figure 21.1 shows a block diagram of the on-chip RAM.

Internal data bus (upper 8 bits)

Internal data bus (lower 8 bits)

H'FFB000

H'FFB002

H'FFB004

H'FFFFC0

H'FFB001

H'FFB003

H'FFB005

H'FFFFC1

H'FFFFFE H'FFFFFF

H'FFEFBE H'FFEFBF

Figure 21.1 Block Diagram of RAM (H8S/2633 Group and H8S/2633R)