Datasheet

Section 22 ROM
R01UH0166EJ0600 Rev. 6.00 Page 939 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Section 22 ROM
22.1 Overview
The H8S/2633 Group and H8S/2633R have 256 kbytes of on-chip flash memory, or 256 kbytes of
on-chip mask ROM, the H8S/2632, H8S/2695 have 192 kbytes of mask ROM, and the H8S/2631
has 128 kbytes of mask ROM. The ROM is connected to the bus master via a 16-bit data bus,
enabling both byte and word data to be accessed in one state. Instruction fetching is thus speeded
up, and processing speed increased.
The on-chip ROM is enabled and disabled by setting the mode pins (MD2, MD1, and MD0).
The flash memory version can be erased and programmed on-board, as well as with a special-
purpose PROM programmer.
22.1.1 Block Diagram
Figure 22.1 shows a block diagram of 256-kbyte ROM.
Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
H'000000
H'000002
H'03FFFE
H'000001
H'000003
H'03FFFF
Figure 22.1 Block Diagram of ROM (256 kbytes)
22.1.2 Register Configuration
The H8/2633 Group operating mode is controlled by the mode pins and the MDCR register. The
register configuration is shown in table 22.1.