Datasheet

Section 9 I/O Ports
Rev. 3.00 Mar. 15, 2006 Page 135 of 526
REJ09B0060-0300
9.6.2 Port Data Register 7 (PDR7)
PDR7 is a general I/O port data register of port 7.
Bit Bit Name
Initial
Value R/W Description
7
6
5
4
3
2
1
0
P77
P76
P75
P74

P72
P71
P70
0
0
0
0
1
0
0
0
R/W
R/W
R/W
R/W

R/W
R/W
R/W
PDR7 stores output data for port 7 pins.
If PDR7 is read while PCR7 bits are set to 1, the values
stored in PDR7 are read. If PDR7 is read while PCR7
bits are cleared to 0, the pin states are read regardless
of the value stored in PDR7.
Bit 3 is a reserved bit. This bit is always read as 1.
9.6.3 Pin Functions
The correspondence between the register specification and the port functions is shown below.
• P77 pin
Register PCR7
Bit Name PCR77 Pin Function
Setting Value 0 P77 input pin
1 P77 output pin
• P76/TMOV pin
Register TCSRV PCR7
Bit Name OS3 to OS0 PCR76 Pin Function
Setting Value 0000 0 P76 input pin
1 P76 output pin
Other than
above
X TMOV output pin
[Legend] X: Don't care.