Datasheet

Rev. 3.00 Mar. 15, 2006 Page xvii of xxxii
Section 18 I
2
C Bus Interface 2 (IIC2)................................................................341
18.1 Features............................................................................................................................. 341
18.2 Input/Output Pins.............................................................................................................. 343
18.3 Register Descriptions........................................................................................................ 344
18.3.1 I
2
C Bus Control Register 1 (ICCR1)................................................................. 344
18.3.2 I
2
C Bus Control Register 2 (ICCR2)................................................................. 347
18.3.3 I
2
C Bus Mode Register (ICMR)........................................................................ 348
18.3.4 I
2
C Bus Interrupt Enable Register (ICIER)....................................................... 350
18.3.5 I
2
C Bus Status Register (ICSR)......................................................................... 352
18.3.6 Slave Address Register (SAR).......................................................................... 355
18.3.7 I
2
C Bus Transmit Data Register (ICDRT)......................................................... 356
18.3.8 I
2
C Bus Receive Data Register (ICDRR).......................................................... 356
18.3.9 I
2
C Bus Shift Register (ICDRS)........................................................................ 356
18.4 Operation .......................................................................................................................... 357
18.4.1 I
2
C Bus Format.................................................................................................. 357
18.4.2 Master Transmit Operation............................................................................... 358
18.4.3 Master Receive Operation................................................................................. 360
18.4.4 Slave Transmit Operation ................................................................................. 362
18.4.5 Slave Receive Operation................................................................................... 364
18.4.6 Clocked Synchronous Serial Format................................................................. 366
18.4.7 Noise Canceller................................................................................................. 368
18.4.8 Example of Use................................................................................................. 369
18.5 Interrupts........................................................................................................................... 373
18.6 Bit Synchronous Circuit.................................................................................................... 374
18.7 Usage Notes...................................................................................................................... 375
18.7.1 Issue (Retransmission) of Start/Stop Conditions .............................................. 375
18.7.2 WAIT Setting in I
2
C Bus Mode Register (ICMR) ............................................ 375
Section 19 A/D Converter..................................................................................377
19.1 Features............................................................................................................................. 377
19.2 Input/Output Pins.............................................................................................................. 379
19.3 Register Descriptions........................................................................................................ 380
19.3.1 A/D Data Registers A to D (ADDRA to ADDRD) ..........................................380
19.3.2 A/D Control/Status Register (ADCSR) ............................................................ 381
19.3.3 A/D Control Register (ADCR) ......................................................................... 382
19.4 Operation .......................................................................................................................... 384
19.4.1 Single Mode...................................................................................................... 384
19.4.2 Scan Mode ........................................................................................................ 384
19.4.3 Input Sampling and A/D Conversion Time ...................................................... 385