Datasheet

Section 12 Timer V
Rev. 3.00 Mar. 15, 2006 Page 170 of 526
REJ09B0060-0300
Table 12.2 Clock Signals to Input to TCNTV and Counting Conditions
TCRV0 TCRV1
Bit 2 Bit 1 Bit 0 Bit 0
CKS2 CKS1 CKS0 ICKS0 Description
0 0 0  Clock input prohibited
1 0 Internal clock: counts on φ/4, falling edge
1 Internal clock: counts on φ/8, falling edge
1 0 0 Internal clock: counts on φ/16, falling edge
1 Internal clock: counts on φ/32, falling edge
1 0 Internal clock: counts on φ/64, falling edge
1 Internal clock: counts on φ/128, falling edge
1 0 0  Clock input prohibited
1  External clock: counts on rising edge
1 0  External clock: counts on falling edge
1  External clock: counts on rising and falling
edge
12.3.4 Timer Control/Status Register V (TCSRV)
TCSRV indicates the status flag and controls outputs by using a compare match.
Bit Bit Name
Initial
Value R/W Description
7 CMFB 0 R/W Compare Match Flag B
Setting condition:
When the TCNTV value matches the TCORB value
Clearing condition:
After reading CMFB = 1, cleared by writing 0 to CMFB
6 CMFA 0 R/W Compare Match Flag A
Setting condition:
When the TCNTV value matches the TCORA value
Clearing condition:
After reading CMFA = 1, cleared by writing 0 to CMFA