Datasheet

Section 14 Timer Z
Rev. 3.00 Mar. 15, 2006 Page 214 of 526
REJ09B0060-0300
• Eleven interrupt sources
 Four compare match/input capture interrupts and an overflow interrupt are available for
each channel. An underflow interrupt can be set for channel 1.
Table 14.1 Timer Z Functions
Item Channel 0 Channel 1
Count clock Internal clocks: φ, φ/2, φ/4, φ/8
External clock: FTIOA0 (TCLK)
General registers
(output compare/input
capture registers)
GRA_0, GRB_0, GRC_0, GRD_0 GRA_1, GRB_1, GRC_1, GRD_1
Buffer register GRC_0, GRD_0 GRC_1, GRD_1
I/O pins FTIOA0, FTIOB0, FTIOC0,
FTIOD0
FTIOA1, FTIOB1, FTIOC1,
FTIOD1
Counter clearing function Compare match/input capture of
GRA_0, GRB_0, GRC_0, or
GRD_0
Compare match/input capture of
GRA_1, GRB_1, GRC_1, or
GRD_1
0 output Yes Yes
1 output Yes Yes
Compare
match output
output Yes Yes
Input capture function Yes Yes
Synchronous operation Yes Yes
PWM mode Yes Yes
Reset synchronous PWM
mode
Yes Yes
Complementary PWM
mode
Yes Yes
Buffer function
Yes Yes
Interrupt sources Compare match/input capture A0
to D0
Overflow
Compare match/input capture A1
to D1
Overflow
Underflow