Datasheet

Section 14 Timer Z
Rev. 3.00 Mar. 15, 2006 Page 215 of 526
REJ09B0060-0300
ITMZ0
FTIOA0
ITMZ1
ADTRG
Channel 0
timer
Channel 1
timer
Module data bus
FTIOB0
FTIOC0
FTIOD0
FTIOA1
FTIOB1
FTIOC1
FTIOD1
TSTR:
[Legend]
TMDR:
TFCR:
TOER:
TOCR:
ADTRG:
ITMZ0:
ITMZ1:
Timer start register (8 bits)
Timer mode register (8 bits)
TPMR: Timer PWM mode register (8 bits)
Timer function control register (8 bits)
Timer output master enable register (8 bits)
Timer output control register (8 bits)
A/D conversion start trigger output signal
Channel 0 interrupt
Channel 1 interrupt
TOER
TOCR
TPMR TFCR
TSTR TMDR
Control logic
φ, φ/2,
φ/4, φ/8
Figure 14.1 Timer Z Block Diagram