Datasheet

Section 14 Timer Z
Rev. 3.00 Mar. 15, 2006 Page 217 of 526
REJ09B0060-0300
ITMZ1
FTIOD1
FTIOC1
FTIOB1
FTIOA1
TCNT_1
GRA_1 GRB_1
GRC_1 GRD_1
TCR_1
TIORA_1
TSR_1
TIORC_1
TIER_1
POCR_1
TCNT_1:
GRA_1, GRB_1:
GRC_1, GRD_1:
TCR_1:
TIORA_1:
TIER_1:
TSR_1:
ITMZ1:
Timer counter_1 (16 bits)
General registers A_1, B_1, C_1, and D_1 (input capture/output compare registers:
16 bits × 4)
Timer control register_1 (8 bits)
Timer I/O control register A_1 (8 bits)
TIORC_1: Timer I/O control register C_1 (8 bits)
Timer interrupt enable register_1 (8 bits)
POCR_1: PWM mode output level control register_1 (8 bits)
Timer status register_1 (8 bits)
Channel 1 interrupt
[Legend]
φ, φ/2,
φ/4, φ/8
Clock select
Control logic
Module data bus
Comparator
Figure 14.3 Timer Z (Channel 1) Block Diagram