Datasheet

Section 14 Timer Z
Rev. 3.00 Mar. 15, 2006 Page 226 of 526
REJ09B0060-0300
Bit Bit Name
Initial
Value R/W Description
2 EC0 1 R/W Master Enable C0
0: FTIOC0 pin output is enabled according to the
TPMR, TFCR, and TIORC_0 settings
1: FTIOC0 pin output is disabled regardless of the
TPMR, TFCR, and TIORC_0 settings (FTIOC0 pin is
operated as an I/O port).
1 EB0 1 R/W Master Enable B0
0: FTIOB0 pin output is enabled according to the
TPMR, TFCR, and TIORA_0 settings
1: FTIOB0 pin output is disabled regardless of the
TPMR, TFCR, and TIORA_0 settings (FTIOB0 pin is
operated as an I/O port).
0 EA0 1 R/W Master Enable A0
0: FTIOA0 pin output is enabled according to the
TPMR, TFCR, and TIORA_0 settings
1: FTIOA0 pin output is disabled regardless of the
TPMR, TFCR, and TIORA_0 settings (FTIOA0 pin is
operated as an I/O port).