Datasheet

Section 17 Serial Communication Interface 3 (SCI3)
Rev. 3.00 Mar. 15, 2006 Page 308 of 526
REJ09B0060-0300
Bit Bit Name
Initial
Value R/W Description
6 RDRF 0 R/W Receive Data Register Full
Indicates that the received data is stored in RDR.
[Setting condition]
• When serial reception ends normally and receive
data is transferred from RSR to RDR
[Clearing conditions]
• When 0 is written to RDRF after reading RDRF = 1
• When data is read from RDR
5 OER 0 R/W Overrun Error
[Setting condition]
• When an overrun error occurs in reception
[Clearing condition]
• When 0 is written to OER after reading OER = 1
4 FER 0 R/W Framing Error
[Setting condition]
• When a framing error occurs in reception
[Clearing condition]
• When 0 is written to FER after reading FER = 1
3 PER 0 R/W Parity Error
[Setting condition]
• When a parity error is detected during reception
[Clearing condition]
• When 0 is written to PER after reading PER = 1
2 TEND 1 R Transmit End
[Setting conditions]
• When the TE bit in SCR3 is 0
• When TDRE = 1 at transmission of the last bit of a
1-frame serial transmit character
[Clearing conditions]
• When 0 is written to TDRE after reading TDRE = 1
• When the transmit data is written to TDR