Datasheet

ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller QFP 80 (14x14) 16-Bit 20 MHz I/O number 59

Section 22 List of Registers

Rev. 3.00 Mar. 15, 2006 Page 421 of 526

REJ09B0060-0300

Register

Name

Reset

Active

Sleep

Subactive

Subsleep

Standby

Module

PCR2 Initialized — — — — — I/O port

PCR3 Initialized — — — — —

PCR5 Initialized — — — — —

PCR6 Initialized — — — — —

PCR7 Initialized — — — — —

PCR8 Initialized — — — — —

PCR9 Initialized — — — — —

SYSCR1 Initialized — — — — — Power-down

SYSCR2 Initialized — — — — —

IEGR1 Initialized — — — — — Interrupt

IEGR2 Initialized — — — — —

IENR1 Initialized — — — — —

IENR2 Initialized — — — — —

IRR1 Initialized — — — — —

IRR2 Initialized — — — — —

IWPR Initialized — — — — —

MSTCR1 Initialized — — — — — Power-down

MSTCR2 Initialized — — — — —

Notes:  is not initialized

1. LVDC: Low-voltage detection circuits (optional)

2. WDT: Watchdog timer