Datasheet

Rev. 3.00 Mar. 15, 2006 Page 517 of 526
REJ09B0060-0300
Item Page Revision (See Manual for Details)
Amended
Bit Bit Name Description
0 SYNC Timer Synchronization
0: TCNT_1 and TCNT_0 operate
as a different timer
1: TCNT_1 and TCNT_0 are
synchronized
TCNT_1 and TCNT_0 can be
pre-set or cleared synchronously
14.3.2 Timer Mode Register
(TMDR)
221
14.3.7 Timer Counter (TCNT) 228 ….The TCNT counters cannot be accessed in 8-bit
units; they must always be accessed as a 16-bit unit.
TCNT is initialized to H'0000.
Figure 14.17 Example of Input
Capture Operation
245 Amended
Counter cleared by FTIOB input (falling edge)
Time
14.4.4 Synchronous Operation 248 Added
Figure 14.20 shows an example of synchronous
operation. In this example, …. set for the channel 1
counter clearing source. In addition, the same input
clock has been set as the counter input clock for
channel 0 and channel 1. Two-phase PWM waveforms
are….