Datasheet

Section 12 Timer Z
Rev. 4.00 Mar. 15, 2006 Page 186 of 556
REJ09B0026-0400
12.3.14 Interface with CPU
16-Bit Register: TCNT and GR are 16-bit registers. Reading/writing in a 16-bit unit is enabled
but disabled in an 8-bit unit since the data bus with the CPU is 16-bit width. These registers must
always be accessed in a 16-bit unit. Figure 12.5 shows an example of accessing the 16-bit
registers.
H
Internal data bus
Bus interface
Module data bus
C
P
U
L
TCNTLTCNTH
Figure 12.5 Accessing Operation of 16-Bit Register (between CPU and TCNT (16 Bits))
8-Bit Register: Registers other than TCNT and GR are 8-bit registers that are connected internally
with the CPU in an 8-bit width. Figure 12.6 shows an example of accessing the 8-bit registers.
TSTR
H
Internal data bus
Bus interface
Module data bus
C
P
U
L
Figure 12.6 Accessing Operation of 8-Bit Register (between CPU and TSTR (8 Bits))