Datasheet

Section 12 Timer Z
Rev. 4.00 Mar. 15, 2006 Page 210 of 556
REJ09B0026-0400
12.4.7 Complementary PWM Mode
Three PWM waveforms for non-overlapped normal and counter phases are output by combining
channels 0 and 1.
In complementary PWM mode, the FTIOB0 to FTIOD0 and FTIOA1 to FTIOD1 pins become
PWM-output pins automatically. TCNT_0 and TCNT_1 perform an increment or decrement
operation. Tables 12.6 and 12.7 show the output pins and register settings in complementary PWM
mode, respectively.
Figure 12.29 shows the example of complementary PWM mode setting procedure.
Table 12.6 Output Pins in Complementary PWM Mode
Channel Pin Name I/O Pin Function
0 FTIOC0 Output Toggle output in synchronous with PWM cycle
0 FTIOB0 Output PWM output 1
0 FTIOD0 Output PWM output 1 (counter-phase waveform non-overlapped
with PWM output 1)
1 FTIOA1 Output PWM output 2
1 FTIOC1 Output PWM output 2 (counter-phase waveform non-overlapped
with PWM output 2)
1 FTIOB1 Output PWM output 3
1 FTIOD1 Output PWM output 3 (counter-phase waveform non-overlapped
with PWM output 3)