Datasheet

Section 15 Controller Area Network for Tiny (TinyCAN)
Rev. 4.00 Mar. 15, 2006 Page 343 of 556
REJ09B0026-0400
Ye s
No
Note: Processing in a shaded box requires setting by software.
TinyCAN is in normal mode
TinyCAN is in halt mode
TinyCAN is during
transmission, reception,
or in bus off state?
LSI standby mode or
TinyCAN module standby
mode
Write 1 to HLTRQ in MCR
(halt mode)
Read RHI in TCIRR0 = 1
Read HALT in GSR = 1
Interrupt occurred
(RHI in TCIRR0 = 1)
LSI standby mode → normal operation
Clear all bits in TCIRR1
and TCIRR0
Specify transition to standby
mode or set TCMSC in TCMR
Ye s
Ye s
No
No
Falling edge detected
on CAN bus?
11 recessive bits
received continuously?
TinyCAN is in normal mode
and ready for action
Interrupt occurred
(WUPI in TCIRR1 = 1)
Clear WUPI bit in TCIRR1 to 0
Write 0 to HLTRQ in MCR
LSI standby mode
Module standby mode → normal operation
TinyCAN is in module
standby mode
Normal operation → LSI standby mode
or
Normal operation → module standby mode
Clear MSTTC in TCMR to 0
Write 0 to HLTRQ in MCR
No
11 recessive bits received
continuously?
Ye s
TinyCAN is in normal mode
and ready for action
Figure 15.18 Flowchart for Transition between Active Mode and Standby Mode or
Module Standby Mode