Datasheet

Section 16 Synchronous Serial Communication Unit (SSU)
Rev. 4.00 Mar. 15, 2006 Page 361 of 556
REJ09B0026-0400
16.4.3 Relationship between Data Input/Output Pin and Shift Register
Relationship of connection between the data input/output pin and SSTRSR changes according to a
combination of the MSS bit in SSCRH and the SSUMS bit in SSCRL. It also changes by the
BIDE bit in SSCRH. Figure 16.3 shows the relationship.
SSO
Shift register
(SSTRSR)
Shift register
(SSTRSR)
Shift register
(SSTRSR)
Shift register
(SSTRSR)
(1) When SSUMS = 0:
(3) When SSUMS = 1, BIDE = 0, and MSS = 0:
(2) When SSUMS = 1, BIDE = 0, and MSS = 1:
(4) When SSUMS = 1 and BIDE = 1:
SSI
SSO
SSI
SSO
SSI
SSO
SSI
Figure 16.3 Relationship between Data Input/Output Pin and Shift Register