Datasheet

Rev. 4.00 Mar. 15, 2006 Page 549 of 556
REJ09B0026-0400
Main Revisions and Additions in this Edition
Item Page Revision (See Manual for Details)
Preface
Notes
vii Added
When using an on-chip emulator (E7, E8) for H8/36057
and H8/36037 program development and debugging,
the following restrictions must be noted.
1. The NMI pin is reserved for the E7 or E8, and cannot
be used.
2. Pins P85, P86, and P87 cannot be used. In order to
use these pins, additional hardware must be
provided on the user board.
3. Area H'D000 to H'DFFF is used by the E7 or E8, and
is not available to the user.
4. Area H'F780 to H'FB7F must on no account be
accessed.
5. When the E7 or E8 is used, address breaks can be
set as either available to the user or for use by the
E7 or E8. If address breaks are set as being used by
the E7 or E8, the address break control registers
must not be accessed.
6. When the E7 or E8 is used, NMI is an input/output
pin (open-drain in output mode), P85 and P87 are
input pins, and P86 is an output pin.
Section 8 RAM 109 Added
Note: * When the E7 or E8 is used, area H'F780 to
H'FB7F must not be accessed.
Amended
Bit Bit Name Description
0 SYNC Timer Synchronization
0: TCNT_1 and TCNT_0 operate
as a different timer
1: TCNT_1 and TCNT_0 are
synchronized
TCNT_1 and TCNT_0 can be
pre-set or cleared synchronously
12.3.2 Timer Mode Register
(TMDR)
171