Datasheet

Rev. 2.00 Sep. 23, 2005 Page xv of xxx
15.4.3 Data Transmission ................................................................................................ 258
15.4.4 Serial Data Reception ........................................................................................... 260
15.5 Operation in Clocked Synchronous Mode......................................................................... 264
15.5.1 Clock..................................................................................................................... 264
15.5.2 SCI3 Initialization................................................................................................. 264
15.5.3 Serial Data Transmission...................................................................................... 265
15.5.4 Serial Data Reception (Clocked Synchronous Mode)........................................... 267
15.5.5 Simultaneous Serial Data Transmission and Reception........................................ 269
15.6 Multiprocessor Communication Function.......................................................................... 270
15.6.1 Multiprocessor Serial Data Transmission............................................................. 271
15.6.2 Multiprocessor Serial Data Reception .................................................................. 272
15.7 Interrupts............................................................................................................................ 275
15.8 Usage Notes....................................................................................................................... 276
15.8.1 Break Detection and Processing ........................................................................... 276
15.8.2 Mark State and Break Sending.............................................................................. 276
15.8.3 Receive Error Flags and Transmit Operations
(Clocked Synchronous Mode Only) .....................................................................276
15.8.4 Receive Data Sampling Timing and Reception Margin in Asynchronous
Mode.....................................................................................................................277
Section 16 I
2
C Bus Interface 2 (IIC2)................................................................279
16.1 Features.............................................................................................................................. 279
16.2 Input/Output Pins...............................................................................................................281
16.3 Register Descriptions.........................................................................................................282
16.3.1 I
2
C Bus Control Register 1 (ICCR1)..................................................................... 282
16.3.2 I
2
C Bus Control Register 2 (ICCR2)..................................................................... 285
16.3.3 I
2
C Bus Mode Register (ICMR)............................................................................ 287
16.3.4 I
2
C Bus Interrupt Enable Register (ICIER)...........................................................289
16.3.5 I
2
C Bus Status Register (ICSR)............................................................................. 291
16.3.6 Slave Address Register (SAR).............................................................................. 294
16.3.7 I
2
C Bus Transmit Data Register (ICDRT)............................................................. 295
16.3.8 I
2
C Bus Receive Data Register (ICDRR).............................................................. 295
16.3.9 I
2
C Bus Shift Register (ICDRS)............................................................................ 295
16.4 Operation ........................................................................................................................... 296
16.4.1 I
2
C Bus Format...................................................................................................... 296
16.4.2 Master Transmit Operation................................................................................... 297
16.4.3 Master Receive Operation..................................................................................... 299
16.4.4 Slave Transmit Operation ..................................................................................... 301
16.4.5 Slave Receive Operation....................................................................................... 304
16.4.6 Clocked Synchronous Serial Format..................................................................... 305