Datasheet

Section 12 Timer Z
Rev. 2.00 Sep. 23, 2005 Page 151 of 444
REJ09B0068-0200
ITMZ0
FTIOA0
ITMZ1
ADTRG
Channel 0
timer
Channel 1
timer
Module data bus
FTIOB0
FTIOC0
FTIOD0
FTIOA1
FTIOB1
FTIOC1
FTIOD1
TSTR:
TMDR:
TPMR:
TFCR:
TOER:
TOCR:
ADTRG:
ITMZ0:
ITMZ1:
[Legend]
Timer start register (8 bits)
Timer mode register (8 bits)
Timer PWM mode register (8 bits)
Timer function control register (8 bits)
Timer output master enable register (8 bits)
Timer output control register (8 bits)
A/D conversion start trigger output signal
Channel 0 interrupt
Channel 1 interrupt
TOER
TOCR
TPMR TFCR
TSTR TMDR
Control logic
φ, φ/2,
φ/4, φ/8
Figure 12.1 Timer Z Block Diagram