Datasheet

Section 12 Timer Z
Rev. 2.00 Sep. 23, 2005 Page 166 of 444
REJ09B0068-0200
Bit Bit Name
Initial
value R/W Description
2
1
0
TPSC2
TPSC1
TPSC0
0
0
0
R/W
R/W
R/W
Time Prescaler 2 to 0
000: Internal clock: count by φ
001: Internal clock: count by φ/2
010: Internal clock: count by φ/4
011: Internal clock: count by φ/8
1XX: External clock: count by FTIOA0 (TCLK) pin input
Notes: 1. When GR functions as an output compare register, TCNT is cleared by compare match.
When GR functions as input capture, TCNT is cleared by input capture.
2. Synchronous operation is set by TMDR.
3. X: Don't care