Datasheet

Rev. 2.00 Sep. 23, 2005 Page xxiii of xxx
Figure 15.5 Example of SCI3 Transmission in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit) ...........................................................................258
Figure 15.6 Sample Serial Transmission Data Flowchart (Asynchronous Mode)......................259
Figure 15.7 Example of SCI3 Reception in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit) ...........................................................................260
Figure 15.8 Sample Serial Reception Data Flowchart (Asynchronous Mode)(1)....................... 262
Figure 15.8 Sample Serial Reception Data Flowchart (Asynchronous Mode)(2)....................... 263
Figure 15.9 Data Format in Clocked Synchronous Communication .......................................... 264
Figure 15.10 Example of SCI3 Transmission in Clocked Synchronous Mode........................... 265
Figure 15.11 Sample Serial Transmission Flowchart (Clocked Synchronous Mode) ................ 266
Figure 15.12 Example of SCI3 Reception in Clocked Synchronous Mode................................ 267
Figure 15.13 Sample Serial Reception Flowchart (Clocked Synchronous Mode)...................... 268
Figure 15.14 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations
(Clocked Synchronous Mode)...............................................................................269
Figure 15.15 Example of Inter-Processor Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A) .......................................... 270
Figure 15.16 Sample Multiprocessor Serial Transmission Flowchart ........................................ 271
Figure 15.17 Sample Multiprocessor Serial Reception Flowchart (1)........................................ 272
Figure 15.17 Sample Multiprocessor Serial Reception Flowchart (2)........................................ 273
Figure 15.18 Example of SCI3 Reception Using Multiprocessor Format
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit).............................. 274
Figure 15.19 Receive Data Sampling Timing in Asynchronous Mode ...................................... 277
Section 16 I
2
C Bus Interface 2 (IIC2)
Figure 16.1 Block Diagram of I
2
C Bus Interface 2..................................................................... 280
Figure 16.2 External Circuit Connections of I/O Pins ................................................................ 281
Figure 16.3 I
2
C Bus Formats ...................................................................................................... 296
Figure 16.4 I
2
C Bus Timing........................................................................................................ 296
Figure 16.5 Master Transmit Mode Operation Timing (1)......................................................... 298
Figure 16.6 Master Transmit Mode Operation Timing (2)......................................................... 298
Figure 16.7 Master Receive Mode Operation Timing (1)........................................................... 300
Figure 16.8 Master Receive Mode Operation Timing (2)........................................................... 301
Figure 16.9 Slave Transmit Mode Operation Timing (1) ...........................................................302
Figure 16.10 Slave Transmit Mode Operation Timing (2) .........................................................303
Figure 16.11 Slave Receive Mode Operation Timing (1)........................................................... 304
Figure 16.12 Slave Receive Mode Operation Timing (2)........................................................... 305
Figure 16.13 Clocked Synchronous Serial Transfer Format....................................................... 305
Figure 16.14 Transmit Mode Operation Timing......................................................................... 306
Figure 16.15 Receive Mode Operation Timing .......................................................................... 307
Figure 16.16 Block Diagram of Noise Conceler......................................................................... 308
Figure 16.17 Sample Flowchart for Master Transmit Mode.......................................................309