Datasheet

Rev. 2.00 Sep. 23, 2005 Page 444 of 444
REJ09B0068-0200
TDR .............................243, 346, 352, 357
TFCR ...........................159, 345, 351, 355
TIER ............................172, 344, 350, 355
TIORA.........................167, 344, 350, 355
TIORC .........................169, 344, 350, 355
TLB1 .................................................. 131
TMB1 ..........................130, 346, 351, 356
TMDR .........................157, 345, 351, 355
TMWD ........................232, 347, 353, 357
TOCR ..........................163, 345, 351, 355
TOER...........................161, 345, 351, 355
TPMR ..........................158, 345, 351, 355
TSR..............................170, 344, 350, 355
TSTR ...........................156, 345, 351, 355
Registers states in each operating
mode ....................................................... 355
Reset exception handling.......................... 53
Reset synchronous PWM mode.............. 193
ROM......................................................... 79
S
Sample-and-hold circuit ......................... 296
Scan mode .............................................. 295
Serial communication interface 3
(SCI3) ..................................................... 239
Shift instructions....................................... 22
Single mode............................................ 295
Slave address .......................................... 297
Sleep mode ............................................... 76
Software protection................................... 93
Stack pointer (SP) ..................................... 13
Stack status ............................................... 56
Standby mode ........................................... 77
Start condition......................................... 297
Stop condition......................................... 297
Subsleep mode .......................................... 77
Synchronous operation............................ 186
System clock generator............................. 65
System control instructions....................... 26
T
Timer B1................................................. 129
Timer V................................................... 133
Timer Z ................................................... 149
Transfer rate............................................ 284
Trap instruction......................................... 43
V
Vector address........................................... 44
W
Watchdog timer....................................... 229
Waveform output .................................... 238
Waveform output by compare match...... 179
WKP5 to WKP0 interrupts ....................... 54