Datasheet

Section 2 CPU
Rev. 2.00 Sep. 23, 2005 Page 28 of 444
REJ09B0068-0200
(3) Effective Address Extension
8, 16, or 32 bits specifying immediate data, an absolute address, or a displacement. A24-bit
address or displacement is treated as a 32-bit data in which the first 8 bits are 0 (H'00).
(4) Condition Field
Specifies the branching condition of Bcc instructions.
op
op
rn
rm
NOP, RTS, etc.
ADD.B Rn, Rm, etc.
MOV.B @(d:16, Rn), Rm
rn rm
op
EA(disp)
op cc EA(disp) BRA d:8
(1) Operation field only
(2) Operation field and register fields
(3) Operation field, register fields, and effective address extension
(4) Operation field, effective address extension, and condition field
Figure 2.7 Instruction Formats